Sonnet Suites - Via Metal and Meshing Definitions in V13
Features at a Glance
- Vias now have independent conductor characteristics from planar metals
- Via conductor definitions consistent with RFIC process definitions
- Alternative meshing controls possible for rapid prototyping approximations
New Via Metal Type
The Metal Types in Sonnet have been expanded to two metal definitions: Planar metal and Via metals. In previous releases, via metal properties were specified using the same properties as planar metal. Starting with Release 13, via metal properties are set and governed by a separate metal loss type.
Via metal definitions may be set in any of the following ways:
- Volume model - Bulk properties of the metal definition are used for the via, along with either a wall thickness or an indication that it is a filled via. Wall thickness definition governs thickness loss effects independent of background grid.
- Surface model - Metal properties for the via are specified in terms of Rdc, Rrf and Xdc (ohms/square).
- Array model - Bulk conductivity and fill factor are defined, and this fill is assumed to apply to the region bounded by the via shape.
New Via Meshing Definitions
New via meshing properties have been added to the Via Properties dialogue, presenting more controls and efficient meshing/simulation options for vias.
Via Properties for a particular via or for a selection group of vias can be set to inherit properties of a defined via metal type, and the presence of a via pads for the simulation model enforced. Via pads provide "covers" over the top and bottom of the via shape outline. Via pads are especially useful when a MIM capacitor definition is formed in a thick metal process through the use of a via outline; the Via pad will serve to "cover over" the via to provide a top or bottom plate for the capacitor surface metal.
Meshing Fill presents the designer with alternative ways to speed the simulation by creating more approximate simulation vias that will simulate faster and use less memory. There are four type of Via Mesh settings:
The default is "Ring" and is sufficient for most MMIC or PCB applications. RFIC designers may find the "vertices" or "center" fill to provide a faster simulation alternative for small interconnects that have "Array" metal definitions.