For via arrays, the small size of the individual vias and the large number in the array usually drive Sonnet model memory and analysis time requirements beyond what is practical to analyze. This often requires that you simplify the via geometry detail before performing your EM simulation. In the past, via array simplification would need to be done manually by deleting vias and replacing with a single, larger via polygon.
The Simplify Via Array feature automatically performs this simplification during the translation process. It can be invoked inside the Keysight ADS Interface, the Cadence Virtuoso Interface, and Cadence AWR Microwave Office Interface. It may also be invoked in Sonnet’s project editor when performing an import using the Gerber/ODB++ Translator, GDSII Translator or DXF Translator.
Additional Simplify Via Array Options